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MYD-Y7Z010/007S Development Board - MYD-Y7Z010/007S
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MYD-Y7Z010/007S Development Board - MYD-Y7Z010/007S

MYD-Y7Z010/007S Development Board - MYD-Y7Z010/007S
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Price: $229.00
Availability: 2 - 3 Days
Model: MYD-Y7Z010/007S
Average Rating: Not Rated


MYD-Y7Z010/007S Development Board

- MYC-Y7Z010/007S CPU Module as Controller Board 
- 667MHz Xilinx XC7Z010 or XC7Z007S ARM Cortex-A9 Processor with Xilinx 7-series FPGA logic 
- 512MB DDR3, 4GB eMMC Flash, 16MB QSPI Flash 
- USB Host, 3 x Gigabit Ethernet, RS232, RS485, CAN, TF, GPIO… 
- Optional LCD/WiFi/Camera Modules and IO Extension Cape 
- Ready-to-Run Linux 3.15.0 
- Supports -40 to +85 Celsius Extended Temperature Operation for Industrial Applications


The MYD-Y7Z010/007S development board is powered by Xilinx XC7Z007S (Zynq-7007S) or XC7Z010 Zynq-7010) SoC device. It is a cost-effective and high-performance solution for industrial application such as Industrial Ethernet, machine vision, PLC/HMI and etc. The board is ready to run Linux and supports industrial operating temperature ranging from -40 to +85 Celsius.

The MYD-Y7Z010/007S development board employs the MYC-Y7Z010/007S as the controller board by populating the CPU Module on its base board through 1.27mm 180-pin stamp hole (Castellated-Hole) interface, allowing users to take the advantages of numerous extended out signals. Core components on CPU Module including Z-7010 or Z-7007S processor, 512MB DDR3, 4GB eMMC, 16MB QSPI Flash, Gigabit Ethernet PHY and external watchdog. Additionally, the MYD-Y7Z010/007S development board takes full features of the Z-7010 or Z-7007S all programmable SoC to create a rich set of peripherals to the base board through headers and connectors including RS232, RS485, USB Host, three Gigabit Ethernet ports, CAN, TF card slot, JTAG as well as one 2.54mm pitch 2 x 25-pin expansion header to let more GPIOs available for further extension.

MYD-Y7Z010/007S Development Board

MYIR has designed an IO expansion board MYD-Y7Z010/007S IO Cape to connect to the MYD-Y7Z010/007S development board via the 2.54mm pitch 2 x 25-pin expansion header to expand and enhances its functionality with added peripherals and signals including HDMI, Camera, LCD and Pmods.



                                   MYD-Y7Z010/007S IO Cape                           MYD-Y7Z010/007S IO Cape Mounted on Development Board


The 4.3- and 7-inch LCD Modules as well as MY-CAM011B camera module from MYIR can be supported through the 
MYD-Y7Z010/007S IO Cape. Optional USB WiFi and Camera modules are also provided. With all these features, the 
MYD-Y7Z010/007S board is not only great for integration into custom design, but also can be used as a stand-alone development board for evaluating solutions based on Xilinx Zynq-7000.




Mechanical Parameters

  • Dimensions: 153mm x 80mm (base board), 75mm x 50mm (CPU Module)
  • PCB Layers: 4-layer design (base board), 10-layer design (CPU Module)
  • Power supply: +12V/2A 
  • Working temp.: -40~85 Celsius

The MYD-Y7Z010/007S Controller Board (MYC-Y7Z010/007S CPU Module)

MYC-Y7Z010/007S CPU Module


  • Xilinx XC7Z010-1CLG400I (Zynq-7010) or XC7Z007S-1CLG400I (Zynq-7007S)

     ARM® Cortex™-A9 MPCore processor

    - 667MHz dual-core processor (up to 866MHz, for XC7Z010) 
    - 667MHz single-core processor (up to 766MHz, for XC7Z007S)
    - Integrated Artix-7 class FPGA subsystem

    with 28K logic cells, 17,600 LUTs, 80 DSP slices (for XC7Z010)

    with 23K logic cells, 14,400 LUTs, 66DSP slices (for XC7Z007S)

    - NEON™ & Single / Double Precision Floating Point for each processor

    - Supports a Variety of Static and Dynamic Memory Interfaces


  • 512MB DDR3 SDRAM
  • 4GB eMMC Flash
  • 16MB QSPI Flash


Peripherals and Signals Routed to Pins

  • 10/100/1000M Ethernet PHY
  • External watchdog
  • Three LEDs
    - One red LED for power indicator
    - One green LED for FPGA program done indicator
    - One flashing green LED for system indicator 
  • 1.27mm 180-pin expansion connectors bring out below signals:
    - One Gigabit Ethernet
    - One USB OTG 2.0 (need external USB PHY-USB3320)
    - Two Serial ports 
    - Two I2C
    - Two CAN BUS
    - Two SPI

    * Serial ports, I2C, CAN and SPI signals in PS part can be implemented through PL pins via Emio
    - Two ADC (two independent differential ADC, 16-channel ADC brought out through PL pins)
    - One SDIO

The MYD-Y7Z010/007S Base Board


PS Unit

  • One USB Host
  • One RS232 serial port (with isolation)
  • One RS485 (with isolation)
  • One TF card slot
  • One CAN interface (with isolation)
  • One 10/100/1000Mbps Ethernet interface
  • One 2.54mm pitch 14-pin JTAG interface
  • One Debug serial port (UART)


PL Unit

  • One 2.54mm pitch 2 x 25-pin GPIO expansion headers
  • Two 10/100/1000Mbps Ethernet interfaces
  • Three user LEDs


OS Support

  • Linux 3.15.0


Hardware Features

The Zynq®-7000 All Programmable SoC (AP SoC) family integrates the software programmability of an ARM®-based processor with the hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP, and mixed signal functionality on a single device. Consisting of single-core Zynq-7000S and dual-core Zynq-7000 devices, the Zynq-7000 family is the best price to performance-per-watt, fully scalable SoC platform for your unique application requirements.


Zynq-7000S devices feature a single-core ARM Cortex™-A9 processor mated with 28nm Artix®-7 based programmable logic, representing the lowest cost entry point to the scalable Zynq-7000 platform. It includes Zynq Z-7007S, Z-7012S and Z-7014S which target smaller embedded designs. Available with 6.25Gb/s transceivers and outfitted with commonly used hardened peripherals, the Zynq-7000S delivers cost-optimized system integration ideal for industrial IoT applications such as motor control and embedded vision. 

Zynq Z-700S SoC Device Block Diagram




          Zynq Z-7010 and Z-7007S SoC Device Table

Function Block Diagram of MYD-Y7Z010/007S



Dimension Chart of MYD-Y7Z010/007S

Software Features


The MYD-Y7Z010/007S development board is capable of running Linux 3.15.0. MYIR provides software package in product disk along with the goods delivery. The software package features as below:






Boot program

First boot program including FSBL, bitstream


Source code provided

Linux 3.15.0

Source code provided

Source code provided

Gigabit Ethernet driver


Source code provided

CAN driver

LCD Controller


Source code provided

Button driver




File System

Ramdisk system image


Tar file



Relative Download and Links


You can download relative chip datasheet, products datasheet, user manual, software package from below. Any inquiry, please contact MYIR.


1 Xilinx Zynq-7000 Overview 658 KB
2 MYC-Y7Z010/007S CPU Module Overview 998 KB
3 MYC-Y7Z010/007S Pin-out description 376 KB
4 Track length of MYC-Y7Z010/007S CPU Module 407 KB
5 MYD-Y7Z010/007S Development Board Overview 1.01 MB
6 MYD-Y7Z010/007S Base Board Schematic 484 KB
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