- What is a Logic Analyzer?
- How to choose a logic analyzer?
- The features of Perytech logic analyzer
- Try the software
- How to buy it?
- Specification and price
Logic Analyzer Software demo
Logic analyzers and oscilloscopes are instruments used to measure electrical signals. The difference is that an oscilloscope is used to measure analog signals, whereas a logic analyzer is used to measure digital signals.
In addition, a logic analyzer has more measurement channels than an oscilloscope (generally more than 8). Moreover, a logic analyzer has more memory than an oscilloscope.
When using an oscilloscope, the picture is often updated rapidly so changes in signal status can be observed. When using a logic analyzer, the picture is usually not updated frequently; rather, the signal is carefully analyzed and recorded.
The following is a comparison of the two instruments.
Early logic analyzers were large and expensive, which is why not many people used it. PC-based logic analyzers, which were developed later, were smaller and cheaper than the previous logic analyzers. This gradually made logic analyzers more commonplace.
A good logic analyzer must satisfy the following requirements:
1.Easy to use: All engineers experience time constraints and cannot spend too much time learning a new tool. Thus, a logic analyzer must be easy to use.
2.Data compression function: In the absence of the compression function, 1 G of memory can only record 5 s signal at a sampling rate of 200 MS/s. By comparison, the compression function allows longer recording time in most situations.
3.Bus analysis function: A good logic analyzer should not only be able to analyze the bus but also possess a â€œbus packet listâ€ function. The packet list is a very useful function and can reduce the signal analysis time.
4.CE and FCC certifications: CE and FCC certification are basic requirements for electronic products. If a product has not received these certifications, then it may not a reliable product.
Powerful Data Compression Function
Perytechâ€™s logic analyzer has a data compression function with a maximum compression ratio of more than 1 million. This substantially extends the measurement time.
The principle behind the compression mode: in the normal mode, the logic analyzer saves all sampled data in the memory. In the compression mode, only data with signal changes are recorded along with the recording time. Because not all signals change in a sampling period, the compression function can substantially increase the recording time.
For example, when each channel has a memory of 128 k, the sampling rate is 200 MS/s, and the test signal is from a 100 Hz clock, a logic analyzer with no compression function records data for approximately 0.65 ms. The compression ratio of old logic analyzers is only 256 and its recording time is approximately 167 ms. Perytechâ€™s logic analyzer has a maximum compression of 220, which is over 1 million. Under the same conditions, the recording time for Perytechâ€™s logic analyzer exceeds 640,000 ms.
The following figure presents the recording time for three types of logic analyzers. Logic analyzers with no compression function require 128 G of memory to record for 640,000 ms under the same conditions.
What is the Maximum Recording Time in the Compression Mode?
The recording time in the compression mode is related to the frequency of data changes. For example, if a signal changes once every 1 ms, recording time of 8k memory is 8 second.
1 ms * 8000 = 8 s
Actual Test of the Compression Mode
The following figure shows the USB communication when a USB mouse is plugged in. At a sampling rate of 200 MS/s, 64 k of memory records for 5.478 second. Without the compression mode, the recording time for each channel require 1.09 G of memory.
The following picture shows a PLCâ€™s RS-232 communication that was recorded when the logic analyzer was in the compression mode. The RS-232 baud rate of 19200 communicates approximately once every 240 ms. The logic analyzerâ€™s sampling rate was 200 MS/s. Overall, 64 k of memory recorded for 76.9 second. Without the compression mode, the same recording time for each channel would require 15.38 G of memory.
The following video is a demonstration of the compression mode:
Although logic analyzers are powerful, many researchers do not utilize them because of the considerable amount of time required to learn how to use them. The user manuals of some logic analyzers exceed 1000 pages. Engineers do not have that much time to learn how to use a new tool.
By understanding usersâ€™ requirements, Perytech aims to develop logic analyzers with the most user-friendly interface. All operations of Perytechâ€™s logic analyzer are intuitive, enabling users to utilize all the functions successfully without the user manual. Moreover, many user-friendly functions have been developed to enable users to observe signals and analyze data.
Only the most frequently used functions are reserved in the tool bar to avoid confusing users. The icons are simple and clear, meaning that users will not forget how to use the device, even after several years. The advanced functions are available in the pull-down menu.
Basic Operation Only Requires Two Steps
STEP 1: Click the â€œTrigâ€ box (where the cursor is in the below image) to set the trigger condition.
STEP 2: Press the run button.
Convenient Channel Panel Function
The channel panel on the left side of the screen can be used to configure channels for measuring signals. You can set up the names of channels and buses, add/remove channels, copy/paste channels, and change the color of channels. You can also select your required channels by pressing Ctrl + the left mouse button, and then group the channels into one bus (â€œGroup Into Busâ€).
Bus Analysis Function
Perytechâ€™s logic analyzer provides a bus decoding function that can help the user automatically analyze different bus values. This can save a substantial amount of time. The following picture shows an actual analysis of the I2C bus using Perytechâ€™s logic analyzer.
The following picture shows the analysis of the UART(RS-232) BUS (4 channels).
The default bus decoding format is in hexadecimal (Hex) values. You can also choose the decimal display or ASCII (this setting can be found according to Menu → Options → Packet Data Format) format. The following picture is the UART bus shown in the ASCII format.
Moreover, Perytechâ€™s logic analyzer has a packet list function. This function displays the decoded packets sequentially in one window. It is relatively easy to check the packet transmission because you can check more data than waveform view in one window. The following figure is a screenshot of a window that presents the packet list of the I2C bus. Perytech continually improves the new bus analysis function; you can share with us your requirements for the new bus analysis function anytime.
A USB packet list is presented below. When there is a large quantity of data, looking at the packet list is much easier and faster than looking at the waveform decoding.
The packet list can be exported as a text (*.txt) or Excel file (*.csv).
If you are interested in learning about USB technology, please read the following article: USB Enumeration.
Click the right mouse button on the â€œruler areaâ€ (as shown below) at the top of the screen and the cursor function menu will appear. You can select A and B cursors or go to the A, B, and T (â€œTrigâ€) cursor positions. You can drag a cursor by using the left mouse button. When you drag a cursor near the edge of a waveform, it will automatically align to the edge after the left button has been released.
Data Filter Function
The data filter function can be used to filter out required data. The following picture displays an SPI signal. Because the data interval is relatively long, only one section of data can be observed in the picture.
Here, we can use the filter function and set data extraction when the enable signal (A0) is low, as shown in the following screenshot:
After setting the data filter, the measured result is presented in the following waveforms. When the â€œenable signalâ€ is high, the data is filtered, leaving only the data from the low enable signal. The "Separate Data" function retains a piece of the filtered data, which can be used for data separation. This can be useful for analyzing the data. The default is enabled, but users can disable this function.
Frequency Counter Function
The frequency counter function can present a maximum of 10 digits. The highest precision is 0.1 Hz, and the maximum measurable frequency is 200 Mhz.
Data Export Function
The software allows the export of waveform data as text files so that users can analyze data or allow other programs to access the data, as shown below.
Packet Trigger Function
The packet trigger function helps you find the packet that you want. When this function is enabled, the system captures data and checks packets until a packet appears. When a packet appears, the system stops capturing data and shows the packet data on the screen.
Synchronized Move Function
The synchronized move function is helpful if you want to examine the differences between two files. Open two files and activate this function, then use the cursor to select the T, A, or B mark as your start point. Waveforms of the two files align at the start point, and synchronous movement can be zoomed and observed.
In addition to values, the bus can also be displayed in analog form.
Perytechâ€™s logic analyzer has other hardware functions, which are introduced briefly below.
Trig Width: The trigger is activated when signals are larger or smaller than the set time width.
Trig Delay: The trigger is activated when a set period has passed after a trigger signal has been detected. The trigger delay is used to observe signals after the trigger.
Noise Filter: In a high noise environment, users can use the hardware filter function to filter out noise.
Free for upgrading: Lifetime free software upgrading.
The logic analyzer software provides a demonstration mode so you can try the software without a logic analyzer. Please visit our download web page to download the software. The software includes I2C, UART, SPI, and USB samples that can be opened using the Open Sample File function, as shown below.
Logic Analyzer Physical Appearance
Perytech Logic Analyzers comprises a black aluminum alloy case with an excellent texture. The alloy case receives hair-line surface treatment to ensure the exterior is very trendy. The device is small, light, and convenient to carry.
The front and rear panels are laser engraved. This is not only aesthetic but does not have paint peeling problems in the future.
Accessories: External box, Logic-Analyzer, LA-Clips, Clip Line, disc, USB 2.0 cable.
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Max Equal Depth
Max Record Time(Sec)
|Max Sample Rate||200MS/s|
|2^20(More than 1 million)|
|Noise Filter||Support hardware glitch filter with 1 or 2 sampling width|
|Trig Type||Rising Edge, Failing Edge, Either Edge, High, Low, None|
|Trig Width||Support trigger condition that signal is greater than or less than
specific Width Time
|Trig Position||Trigger position can be adjusted for occupying 10% to 90% of memory,
and the default value is 10%
|Trig Voltage Range||+6V ~ -6V|
|Trig Voltage Resolution||0.1V|
|Max Input Voltage||Â±30V|
|Protocol Decode||I2C, SPI, UART, I2S, PS2, 1-Wire, USB 1.1, S/PDIF, SD 1.1/2.0, CAN Bus,
Lin Bus,3-Wire, Microwire, SSI, Miller, Manchester, SM Bus, PM Bus, Modbus,
Jtag, DMX512, LPC, SWD, HDLC, RC-5, ESPI, Wiegand, QI, HDMI CEC,
MII/RMII/GMII, DALI, GPIB, UNI/O, MIDI, FlexRay, (be on the increase)
|OS Support||Windows XP / Vista / Windows 7 /
Windows 8.1 (32 & 64) / Windows 10 (32 & 64)
|Power Source||USB(DC 5V, 500mA)|
|Dimension||134 x 89 x 24(mm)|
The product has passed CE & FCC certification.
PLA-32128: Logic Analyzer
- Brand: Perytech
- Product Code: PLA-32128
- Availability: 2-3 Days